As integration levels increase, the ability to fabricate integrated circuits that perform more complex, operations correspondingly improves. However, as the operational capabilities of integrated circuits increase, the problem of optimizing the number of required input/output (I/O) terminals becomes more critical. On the one hand, in order to maximize the number of potential applications for a given integrated circuit, a sufficient number of package pins must be provided to allow all of the available on-chip capabilities to be fully exploited. On the other hand, minimizing the number of pins and associated I/O circuitry is important for optimizing packaging size, reducing the overall chip area and complexity of the integrated circuitry, and decreasing overall device costs.
To maximize flexibility, integrated circuits are often designed to operate in multiple modes, depending on the desired application. For example, a given integrated circuit may include the capabilities of operating on different types or formats of data and/or in response to different clock signal frequencies. In each case, some technique must be provided for selecting between the available operational modes.
Existing multiple-mode integrated circuits often require one or more additional pins dedicated to controlling mode selection, thereby increasing the size, cost and complexity of the integrated circuit and its packaging. Generally, the more modes available for selection, the more control pins that are required. Additionally, many of these existing circuits require substantial external circuitry for generating the required mode control signals.
Hence new techniques for mode control in multiple-mode integrated circuits are required. These techniques should address the competing interests of allowing the full capabilities of an integrated circuit to be exploited, and minimizing the number of pins required for mode selection. Further, such techniques should not significantly increase the necessary external and/or on-chip mode-control circuitry.